There is ongoing wafer thickness reduction in the MEMS and semiconductor industry. This is because of market demand for smaller devices that afford an increased number of functionalities at reduced cost; and for this, smaller package sizes need to be realised. It is mainly consumer applications that are responsible for this trend, but the demand for smaller package sizes is also attributable to technical advantages, for example better electrical performance or improved thermal management.
Smaller package sizes require extremely thin substrates to build up devices. Those thin and ultra-thin substrates also enable 3D packaging of sensors such as complementary metal-oxide-semiconductor (CMOS) image sensors and others. Producing thin wafers in high quantities puts challenging requirements on handling and processing tools.
Due to their low thickness, thin wafers are vulnerable to stress and breakage. Warping of the wafers during handling and processing causes a high yield loss or can even make it impossible to handle the wafers any more. This means that a thin wafer handling technology with a high degree of flexibility on wafer and substrate sizes is needed. Carrier wafers need to have certain properties, such as: mechanical robustness; chemical and high-temperature resistance; incredibly low tolerances (down to 1 μm thickness variation); and thermal expansion adjusted to the used material, for example, gallium arsenide (GaAs), Indium phosphide (InP), silicon (Si) or silicon carbide (SiC). Furthermore, handling tools sometimes need to be suitable for materials such as GaAs and Si, or even CMOS compatible.
High-end carrier wafers made of glass, quartz or silicon can meet the aforementioned requirements. Glass and quartz are excellent materials for carrier wafers because of their thermal stability and resistance against acids and other chemicals. Bonding to and de-bonding from glass and quartz carrier wafers can be monitored since they are transparent. Furthermore, glass carrier wafers can be cleaned and re-used, thus contributing to cost reduction and environmental protection.
2. Thin wafer handling
In thin wafer handling processes, the device wafer is temporarily bonded to a rigid carrier wafer of high accuracy using a polymer-based adhesive. The general process flow for temporary bonding is shown in figure 1. After handling and processing the device wafer using standard semiconductor process tools, the release (debonding) is carried out by way of various techniques, namely chemicals dissolving the adhesive, heat decreasing the viscosity of the adhesive or laser reducing the adhesive force.
Figure 1: General process flow of temporary wafer bonding
3. Debonding methods – suitable carrier for different applications
In temporary wafer bonding processes, the carrier wafer needs to be removed from the device wafer at the end of processing. Depending on the device characteristics and the process used, there are different specification requirements for carrier wafers. Different types of carrier wafers with special properties for common debonding processes are explained below.
3.1. Carrier wafer for laser release
In laser debonding, the adhesive strength is reduced by exposing it to laser light (figure 2). Debonding methods can be carried out at room temperature.
For laser debonding processes, highly transparent carrier wafers that transmit the relevant laser wavelength are needed. Double-side polished glass or quartz carrier wafers have excellent surface quality and thus meet the requirements of a laser debonding process. After laser exposure, the device wafer can be detached from the carrier wafer.
Finally, the carrier wafer needs to be cleaned and can then be re-used several times. The laser debonding method is mainly used in the fan-out wafer-level packaging and advanced packaging processes.
Summary: Highly transparent and double side polished carriers from glass or quartz are used which transmit the relevant laser wavelength necessary to de-bond device from carrier wafer.
Figure 2: laser release debonding
3.2. Carrier wafer for chemical release
I Here, the de-bonding is caused by chemicals that dissolve the adhesive after processing (including thinning) of the device wafer (figure 3). The carrier wafer is perforated to enable the solvent to pass through it and come into contact with the adhesive. Such carrier wafers can be produced by combining a blank glass carrier with the latest patterning technologies and tight tolerances. To be able to distribute the chemistry as fast as possible, extremely small holes with a high density are needed. More than 150,000 through holes of equal size can be created, which affords smooth and safe debonding whilst the carrier wafer withstands mechanical influences.
Carrier wafers for chemical release are available at a total thickness variation (TTV) as low as 1 micron and in many coefficient of linear thermal expansion (CTE) adapted materials. These carrier wafers can be re-used up to 50 times.
Summary: In order to enable the solvent getting in contact with the adhesive, perforated carriers with high density of holes of equal size are used.
Figure 3: chemical release debonding
3.3. Carrier wafer for thermal release
Thermoplastic adhesives are used for bonding the device wafer or single chips to the carrier wafer. These adhesives decrease in viscosity at higher temperatures (i.e. from 100˚C), so that having undergone a heating process, the device wafer can be sheared from the carrier wafer (figure 4). For this, imperforated carrier wafers or carrier wafers with recessed pockets are needed.
Summary: Blank carriers or carriers with recessed pockets are used.
Figure 4: thermal debonding
4. Adapter carrier – maximum flexibility
The semiconductor and MEMS industry is producing wafers with an increasing variety of diameters. However, the processing equipment required for different wafer diameters or substrate dimensions is not affordable for all companies. Adapter carrier wafers feature pockets to hold wafers with smaller diameters or substrates of smaller dimensions and carry them through the process (figure 5). This allows for the handling and processing of a variety of different wafer and substrate sizes on existing equipment.
Adapter carrier wafers are either surface processed glass or silicon wafers with patterned pocket(s) or silicon wafers permanently bonded to borosilicate glass rings that have been patterned according to the dimensions of the substrate. The so-formed pockets on the wafer with required outer diameter enable processing of smaller wafers and substrates, for example, 150 mm wafers on 200 mm equipment. Even multiple small substrates can be handled, for example, four 76 mm wafers on a 200 mm carrier wafer.
- Glass wafers with patterned pockets
- Silicon wafers with patterned pockets
- Silicon wafers permanently bonded to glass rings
Due to the materials used, these carrier wafers can be used in operating temperatures up to 500˚C. In addition, holes or grooves can be added to enable the use of adapter carrier wafers with vacuum chucking. Unique marking by quick response (QR) codes can be applied for easy tracking.
Summary: In order to keep the possibility of processing smaller or differently shaped wafers or other substrates, adapter carriers are used.
Carrier wafers made of glass, quartz or silicon are fundamental tools for 3D wafer-level packaging of MEMS and sensors. Plan Optik manufactures high-end glass, quartz and silicon carrier wafers for many MEMS- and semiconductor-related processes. They can provide, as outlined above, chemical and high-temperature resistance, exceptionally low tolerances and thermal expansion adjusted to silicon or other substrate materials. Furthermore, non-sticking or sticking surface properties can be incorporated, and excellent surface quality is achievable through double-sided polishing.
This article has been published in the October issue of CMM Magazine. You can find the full article here.